蔡述庭

教授 博士生导师

机构 集成电路工程系

邮箱:shutingcai@gdut.edu.cn

通讯地址:广东工业大学大学城校区理学馆211-1

所属团队:电子设计自动化(EDA)研究团队

简介:

广东省集成电路设计自动化工程技术研究中心主任,国家高层次人才,广东特支计划科技创新领军人才。主要从事电子设计自动化(EDA)、数字安全芯片设计研究。主持国家自然科学基金、广东省重点研发专项、广东省重点领域研发计划等科研项目十余项。在IEEE TVLSI,TCAD,TC,ACM TODAES等期刊发表论文100多篇。2021、2024年获广东省科技进步二等奖。

近年代表性论文:

[1] Z. Lin, H. Zhang, P. Gao, F. Yu, T. Wu, X. Xiong, and S. Cai, “GNN-Based Timing Prediction in Pre-Routing Stage with Multi-Task Learning Strategy,” IEEE Transactions on Computer-Aided Design of Integrated Circuits, vol. 44, no. 8, pp. 3154–3164, 2025.

[2] H. Yan, Y. Wang, P. Gao, F. Yu, Y. Ma, X. Xiong, and S. Cai, “A Lightweight Heterogeneous Graph Embedding Framework for Hotspot Detection,” IEEE Transactions on Computer-Aided Design of Integrated Circuits, vol. 44, no. 9, pp. 3479–3489, 2025.

[3] X. Zheng, M. Cheng, J. Chen, H. Gao, X. Xiong, and S. Cai, “BSSE: Design Space Exploration on the BOOM With Semi-Supervised Learning,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 32, no. 5, pp. 860–869, 2024.

[4] M. Cheng, S. Zhang, X. Zheng, X. Lin, H. Gao, S. Cai, X. Xiong, and B. Yu, “Efficient Design Space Exploration for the BOOM Using SAC-Based Reinforcement Learning,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 33, no. 8, pp. 2252–2263, 2025.

[5] Y. Zhao, Z. Xie, R. Zhan, X. Xiong, Y. Chen, and S. Cai, “NTT-LSU: Tightly Coupled Architecture for Efficient NTT Implementation on RISC-V Processor,” IEEE Transactions on Computer-Aided Design of Integrated Circuits, 2026.

[6] C. Chen, J. Pu, J. Zhang, J. Liao, R. Zhan, F. Yu, Y. Chen, and S. Cai, “A Low-Cost Local Masking Radix-4 NTT Against Soft-Analytical Side-Channel Attacks,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2026.